https://outofsrvc.github.io/en/tags/machine-code/Recent content in Machine-Code on P01NTHugoenTue, 25 Aug 2026 12:00:00 +0300https://outofsrvc.github.io/en/arch/comp-arch-0x2/Tue, 25 Aug 2026 11:00:00 +0300https://outofsrvc.github.io/en/arch/comp-arch-0x2/<p>بسم الله</p> <p>Having taken an overview of the computer&rsquo;s structure in the <a href="../comp-arch-0x0/">first article</a>, and dived into what happens inside the processor in the <a href="../comp-arch-0x1/">second one</a>, today we meet the theoretical foundation linking binary instructions to the operations the processor executes. This article also serves as a practical introduction to Assembly, explaining the structure of its code. Here are the topics we will cover:</p> <h2 id="instruction-set-architecture-isa">Instruction Set Architecture (ISA)</h2> <p>The Instruction Set Architecture (<strong>ISA</strong>) is the theoretical foundation connecting machine code to the instructions the CPU executes:</p>https://outofsrvc.github.io/en/arch/comp-arch-0x3/Tue, 25 Aug 2026 12:00:00 +0300https://outofsrvc.github.io/en/arch/comp-arch-0x3/<p>بسم الله</p> <p>In the <a href="../comp-arch-0x2/">previous article</a> we talked about the ISA and said it defines many things: instructions, data types, registers, memory access, and addressing modes. Since every term there has been covered except addressing modes, this article is dedicated to them, God willing.</p> <blockquote> <p>A note before we continue: if any shortcoming slips into my explanation of a particular part, that is natural — I do not claim perfection in this series or any other; I only strive toward it. If you spot an incorrect concept or an issue with something, you are welcome to clarify it for everyone&rsquo;s benefit. And I ask God to make this work sincerely for His sake.</p>