<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Arch-P01NTs on P01NT</title><link>https://outofsrvc.github.io/en/arch/</link><description>Recent content in Arch-P01NTs on P01NT</description><generator>Hugo</generator><language>en</language><lastBuildDate>Tue, 25 Aug 2026 16:00:00 +0300</lastBuildDate><atom:link href="https://outofsrvc.github.io/en/arch/index.xml" rel="self" type="application/rss+xml"/><item><title>Computer Architecture &amp; Organization</title><link>https://outofsrvc.github.io/en/arch/comp-arch-0x0/</link><pubDate>Tue, 25 Aug 2026 09:00:00 +0300</pubDate><guid>https://outofsrvc.github.io/en/arch/comp-arch-0x0/</guid><description>&lt;p>بسم الله&lt;/p>
&lt;p>The scarcity and weakness of Arabic resources covering these topics was one of the main reasons behind writing this series — the goal is to close that gap, and I ask God to make this work sincerely for His sake.&lt;/p>
&lt;p>God willing, these articles will be the solid foundation you can build upon. We will approach every topic hands-on: writing code in C, then looking at its footprint in Assembly. On with it.&lt;/p></description></item><item><title>Processor Structure &amp; Functions</title><link>https://outofsrvc.github.io/en/arch/comp-arch-0x1/</link><pubDate>Tue, 25 Aug 2026 10:00:00 +0300</pubDate><guid>https://outofsrvc.github.io/en/arch/comp-arch-0x1/</guid><description>&lt;p>بسم الله&lt;/p>
&lt;p>In the &lt;a href="../comp-arch-0x0/">previous article&lt;/a> we talked about computer architecture and organization and the basic parts of a computer. Today, God willing, we dive a little deeper into the processor itself: its components, its functions, and how they work together.&lt;/p>
&lt;h2 id="data-path--control-unit">Data Path &amp;amp; Control Unit&lt;/h2>
&lt;p>The processor consists of fundamental units:&lt;/p>
&lt;ul>
&lt;li>The &lt;strong>Arithmetic Logic Unit (ALU)&lt;/strong>, which performs arithmetic and logic operations.&lt;/li>
&lt;li>The &lt;strong>Control Unit (CU)&lt;/strong>, which generates the control signals needed to coordinate the components.&lt;/li>
&lt;li>Plus a set of fast-access registers.&lt;/li>
&lt;/ul>
&lt;p>These components divide into two main parts:&lt;/p></description></item><item><title>Instruction Set Architecture</title><link>https://outofsrvc.github.io/en/arch/comp-arch-0x2/</link><pubDate>Tue, 25 Aug 2026 11:00:00 +0300</pubDate><guid>https://outofsrvc.github.io/en/arch/comp-arch-0x2/</guid><description>&lt;p>بسم الله&lt;/p>
&lt;p>Having taken an overview of the computer&amp;rsquo;s structure in the &lt;a href="../comp-arch-0x0/">first article&lt;/a>, and dived into what happens inside the processor in the &lt;a href="../comp-arch-0x1/">second one&lt;/a>, today we meet the theoretical foundation linking binary instructions to the operations the processor executes. This article also serves as a practical introduction to Assembly, explaining the structure of its code. Here are the topics we will cover:&lt;/p>
&lt;h2 id="instruction-set-architecture-isa">Instruction Set Architecture (ISA)&lt;/h2>
&lt;p>The Instruction Set Architecture (&lt;strong>ISA&lt;/strong>) is the theoretical foundation connecting machine code to the instructions the CPU executes:&lt;/p></description></item><item><title>Addressing Modes</title><link>https://outofsrvc.github.io/en/arch/comp-arch-0x3/</link><pubDate>Tue, 25 Aug 2026 12:00:00 +0300</pubDate><guid>https://outofsrvc.github.io/en/arch/comp-arch-0x3/</guid><description>&lt;p>بسم الله&lt;/p>
&lt;p>In the &lt;a href="../comp-arch-0x2/">previous article&lt;/a> we talked about the ISA and said it defines many things: instructions, data types, registers, memory access, and addressing modes. Since every term there has been covered except addressing modes, this article is dedicated to them, God willing.&lt;/p>
&lt;blockquote>
&lt;p>A note before we continue: if any shortcoming slips into my explanation of a particular part, that is natural — I do not claim perfection in this series or any other; I only strive toward it. If you spot an incorrect concept or an issue with something, you are welcome to clarify it for everyone&amp;rsquo;s benefit. And I ask God to make this work sincerely for His sake.&lt;/p></description></item><item><title>Cache Memory</title><link>https://outofsrvc.github.io/en/arch/comp-arch-0x4/</link><pubDate>Tue, 25 Aug 2026 13:00:00 +0300</pubDate><guid>https://outofsrvc.github.io/en/arch/comp-arch-0x4/</guid><description>&lt;p>بسم الله&lt;/p>
&lt;p>Having finished the topics concerning the CPU in the last three lessons, we now move on, God willing, to memory topics — which are no less important than what came before them.&lt;/p>
&lt;p>Memory topics divide into three areas: (Virtual Memory, Cache Memory, Internal Memory). We have already covered virtual memory from a practical angle in &lt;a href="https://outofsrvc.github.io/en/cworkshop/virtual-memory-stack-vs-heap/">the virtual memory lesson of the C workshop&lt;/a>; today&amp;rsquo;s topic is &lt;strong>cache memory&lt;/strong>.&lt;/p>
&lt;h2 id="cache-memory-overview">Cache Memory Overview&lt;/h2>
&lt;p>&lt;strong>Cache memory&lt;/strong> is a small, high-speed store usually located between the CPU and main memory (RAM). Its job is to hold copies of the most frequently used data and instructions so the processor can reach them quickly.&lt;/p></description></item><item><title>Internal Memory</title><link>https://outofsrvc.github.io/en/arch/comp-arch-0x5/</link><pubDate>Tue, 25 Aug 2026 14:00:00 +0300</pubDate><guid>https://outofsrvc.github.io/en/arch/comp-arch-0x5/</guid><description>&lt;p>بسم الله&lt;/p>
&lt;p>After covering the cache in the &lt;a href="../comp-arch-0x4/">previous article&lt;/a>, today we wrap up the memory topics so we come away with a clear understanding of memory in general — without descending into external memory, which benefits those working directly with hardware more than software people.&lt;/p>
&lt;h2 id="internal-memory">Internal Memory&lt;/h2>
&lt;p>Internal memory is also known as Main Memory:&lt;/p>
&lt;p>It represents the memory layers closest and fastest to the processor, used to store data and instructions currently being processed, distinguished by fast random access during operation. It includes the registers, cache, RAM, and ROM.&lt;/p></description></item><item><title>I/O System</title><link>https://outofsrvc.github.io/en/arch/comp-arch-0x6/</link><pubDate>Tue, 25 Aug 2026 15:00:00 +0300</pubDate><guid>https://outofsrvc.github.io/en/arch/comp-arch-0x6/</guid><description>&lt;p>بسم الله&lt;/p>
&lt;p>Having covered the processor and memory topics, this article discusses the third essential part of a computer: the input/output (I/O) system.&lt;/p>
&lt;h2 id="the-io-system">The I/O System&lt;/h2>
&lt;p>As we said before, computer architecture consists of the processor, memory, and external peripherals. Peripherals — like the keyboard and printer — receive data from the outside environment and send data to it, connecting to the processor through special interface units.&lt;/p>
&lt;p>These units (I/O Modules) arise to handle the fundamental differences between the processor and peripheral devices, such as:&lt;/p></description></item><item><title>Interconnections</title><link>https://outofsrvc.github.io/en/arch/comp-arch-0x7/</link><pubDate>Tue, 25 Aug 2026 16:00:00 +0300</pubDate><guid>https://outofsrvc.github.io/en/arch/comp-arch-0x7/</guid><description>&lt;p>بسم الله&lt;/p>
&lt;p>We have reached the end of the series, and this is the final article. I ask God Almighty to write reward for me and for you, to benefit us from what He taught us and teach us what benefits us — He is the Guardian of that, the All-Capable.&lt;/p>
&lt;p>Having covered the three main components — how are these components interconnected so they can exchange data? Through what is called interconnection structures.&lt;/p></description></item></channel></rss>